Single Hard Fault Detection in Linear Analog Circuits Based On Simulation before Testing Approach

A method for single hard fault detection in linear analog circuits based on simulation before testing approach is proposed in this paper. Simulation before testing approach locates or identifies faulty components of the circuit under test (CUT) by creating a fault dictionary for all the potentially faulty components from the simulation of CUT. In the proposed approach, the CUT is simulated using Modified Nodal Analysis (MNA) to find the values of circuit parameters or diagnosis variables. Test vectors corresponding to the components of CUT are generated from the circuit matrix which act as key feature in identifying the potentially faulty components and are treated as fault dictionary. Test vectors are used to determine the diagnosis variables for testing. The tolerance problems of analog circuit testing as well as the sensitivity of the test vectors to component values affect the practical possibility of the approach. To solve this, test vectors are generated for upper and lower bound values of the components of CUT and testing is performed. A CUT is said to be fault free if the circuit variables are within the fault free range. Fault variables corresponding to the components of CUT are derived and the fault variable which has lowest relative standard deviation is found and the corresponding component is declared as faulty. The proposed approach is tested on bench mark circuits and validated through the results obtained from simulation.